Invention Grant
US08692248B2 Integrated circuit die having input and output circuit pads, test circuitry, and multiplex circuitry
有权
具有输入和输出电路板,测试电路和多路复用电路的集成电路管芯
- Patent Title: Integrated circuit die having input and output circuit pads, test circuitry, and multiplex circuitry
- Patent Title (中): 具有输入和输出电路板,测试电路和多路复用电路的集成电路管芯
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Application No.: US14068819Application Date: 2013-10-31
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Publication No.: US08692248B2Publication Date: 2014-04-08
- Inventor: Lee D. Whetsel , Alan Hales
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L23/58
- IPC: H01L23/58 ; G01R31/26

Abstract:
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the plurality of die/ICs. The response patterns from the tester are input to the test circuits along with the output response of the die/IC to be compared. Also disclosed is the use of a response signal encoding scheme whereby the tester transmits response test commands to the test circuits, using a single signal per test circuit, to perform: (1) a compare die/IC output against an expected logic high, (2) a compare die/IC output against an expected logic low, and (3) a mask compare operation. The use of the signal encoding scheme allows functional testing of die and ICs since all response test commands (i.e. 1-3 above) required at each die/IC output can be transmitted to each die/IC output using only a single tester signal connection per die/IC output. In addition to functional testing, scan testing of die and ICs is also possible.
Public/Granted literature
- US20140055158A1 Integrated Circuit Die Having Input and Output Circuit Pads, Test Circuitry, and Multiplex Circuitry Public/Granted day:2014-02-27
Information query
IPC分类: