Invention Grant
- Patent Title: Power stage
- Patent Title (中): 动力舞台
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Application No.: US13661275Application Date: 2012-10-26
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Publication No.: US08692591B2Publication Date: 2014-04-08
- Inventor: Mustafa Acar , Katarzyna Nowak
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP09164445 20090702
- Main IPC: H03K3/00
- IPC: H03K3/00
Abstract:
A power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.
Public/Granted literature
- US20130285713A1 POWER STAGE Public/Granted day:2013-10-31
Information query
