Invention Grant
US08694868B1 Systems and methods for performing multi-state bit flipping in an LDPC decoder
有权
用于在LDPC解码器中执行多状态位翻转的系统和方法
- Patent Title: Systems and methods for performing multi-state bit flipping in an LDPC decoder
- Patent Title (中): 用于在LDPC解码器中执行多状态位翻转的系统和方法
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Application No.: US13300323Application Date: 2011-11-18
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Publication No.: US08694868B1Publication Date: 2014-04-08
- Inventor: Shashi Kiran Chilappagari , Nedeljko Varnica , Xueshi Yang , Gregory Burd
- Applicant: Shashi Kiran Chilappagari , Nedeljko Varnica , Xueshi Yang , Gregory Burd
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
Systems and methods are provided for decoding data using hard decisions and soft information. In particular, the systems and methods described herein are directed to decoders having variable nodes and check nodes, each with multiple states. The systems and methods include receiving, at a decoder during a first iteration, values for each of a plurality of variable nodes, and determining, during a second iteration, one or more indications for each of a plurality of check nodes based on the one or more values of the variable nodes received during the first iteration. The methods further include updating, at the decoder during the second iteration, the values for each of the variable nodes based on the values of the respective variable node received during the first iteration, and the indications for each of the plurality connected check nodes during the first iteration.
Information query
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