Invention Grant
- Patent Title: Method of manufacturing thin film transistor
- Patent Title (中): 制造薄膜晶体管的方法
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Application No.: US13764320Application Date: 2013-02-11
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Publication No.: US08698160B2Publication Date: 2014-04-15
- Inventor: Hisashi Ohtani
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP10-333852 19981125
- Main IPC: H01L29/04
- IPC: H01L29/04

Abstract:
The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist 110 is formed. The pattern is etched by using the photoresist pattern as an etching mask to form a gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.
Public/Granted literature
- US20130270570A1 METHOD OF MANUFACTURING THIN FILM TRANSISTOR Public/Granted day:2013-10-17
Information query
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