Invention Grant
- Patent Title: Embedded JFETs for high voltage applications
- Patent Title (中): 用于高压应用的嵌入式JFET
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Application No.: US13481462Application Date: 2012-05-25
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Publication No.: US08704279B2Publication Date: 2014-04-22
- Inventor: Jen-Hao Yeh , Chih-Chang Cheng , Ru-Yi Su , Ker Hsiao Huo , Po-Chih Chen , Fu-Chih Yang , Chun Lin Tsai
- Applicant: Jen-Hao Yeh , Chih-Chang Cheng , Ru-Yi Su , Ker Hsiao Huo , Po-Chih Chen , Fu-Chih Yang , Chun Lin Tsai
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/80
- IPC: H01L29/80
Abstract:
A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.
Public/Granted literature
- US20130313617A1 Embedded JFETs for High Voltage Applications Public/Granted day:2013-11-28
Information query
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