A track-and-hold circuit comprises at least first and second amplifier stages, and switched capacitor circuitry coupled between the first and second amplifier stages. In a track mode of operation of the track-and-hold circuit, the switched capacitor circuitry is configured to decouple inputs of the second amplifier stage from respective outputs of the first amplifier stage and to couple the inputs of the second amplifier stage to a common mode voltage via respective first and second capacitors. In a hold mode of operation of the track-and-hold circuit, the switched capacitor circuitry is configured to couple the inputs of the second amplifier stage to the respective outputs of the first amplifier stage via the respective first and second capacitors. Multiple instances of the track-and-hold circuit may be implemented in parallel in a time-interleaved analog-to-digital converter.