发明授权
- 专利标题: Control apparatus
- 专利标题(中): 控制装置
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申请号: US12791404申请日: 2010-06-01
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公开(公告)号: US08707002B2公开(公告)日: 2014-04-22
- 发明人: Koichi Ueda
- 申请人: Koichi Ueda
- 申请人地址: JP Tokyo
- 专利权人: Canon Kabushiki Kaisha
- 当前专利权人: Canon Kabushiki Kaisha
- 当前专利权人地址: JP Tokyo
- 代理机构: Fitzpatrick, Cella, Harper & Scinto
- 优先权: JP2009-138339 20090609; JP2009-145821 20090618; JP2009-150175 20090624
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
This invention improves the access efficiency of each of a plurality of memory devices mounted on a semiconductor chip. The invention provides a memory control circuit including a queue buffer unit, a management unit to set the CKE signal at High for a memory device to which a determination target access command is to be issued when it is determined that the determination target access command has shifted to the head position of the queue buffer unit, a command generating unit to issue an access command, and a data interface unit to execute processing specified by an access command. The management unit performs control to set the CKE signal to Low for the memory device to which the determination target access command is to be issued based on the state of the queue buffer unit when it is determined that the processing by the data interface unit is complete.
公开/授权文献
- US20100313052A1 CONTROL APPARATUS 公开/授权日:2010-12-09
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