发明授权
- 专利标题： Integrated circuit packaging system with interconnects and method of manufacture thereof
- 专利标题（中）： 具有互连的集成电路封装系统及其制造方法
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申请号： US12966071申请日： 2010-12-13
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公开(公告)号： US08709932B2公开(公告)日： 2014-04-29
- 发明人: Soo Won Lee , JiHoon Oh , Sung Jun Yoon
- 申请人： Soo Won Lee , JiHoon Oh , Sung Jun Yoon
- 申请人地址： SG Singapore
- 专利权人： Stats Chippac Ltd.
- 当前专利权人： Stats Chippac Ltd.
- 当前专利权人地址： SG Singapore
- 代理机构： Ishimaru & Associates LLP
- 主分类号： H01L21/44
- IPC分类号： H01L21/44 ; H01L21/00 ; H01L23/02
摘要：
A method of manufacture of an integrated circuit packaging system includes: providing a carrier having a contact pad; forming a first resist layer, having a first resist opening, over the carrier and the contact pad, the first resist opening partially exposing the first contact pad; forming a second resist layer, having a second resist opening over the first resist opening, the second resist opening partially exposing the first resist layer; mounting an integrated circuit over the carrier; and forming an internal interconnect between the integrated circuit and the carrier, the internal interconnect filling the second resist opening with no space between the second resist layer in the second resist opening.
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