A control unit includes at least one computing device and at least one separate peripheral module which is connected to the computing device via a serial multiwire bus, the peripheral module including at least one output stage for transferring serial data to means outside of the control unit. In order to keep the number of pins required on a peripheral module to a minimum, thereby reducing costs for the entire control unit, the peripheral module has an asynchronous single-wire interface between one interface for the serial multiwire bus and the output stage. The asynchronous single-wire interface is preferably a UART (universal asynchronous receiver/transmitter) interface. The serial multiwire bus is preferably a microsecond bus.