Invention Grant
- Patent Title: Methods and system for on-chip decoder for array test
- Patent Title (中): 用于阵列测试的片上解码器的方法和系统
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Application No.: US13259800Application Date: 2010-02-23
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Publication No.: US08722432B2Publication Date: 2014-05-13
- Inventor: Edward J. Bawolek , Curtis D. Moyer , Sameer M. Venugopal
- Applicant: Edward J. Bawolek , Curtis D. Moyer , Sameer M. Venugopal
- Applicant Address: US AZ Scottsdale
- Assignee: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Arizona State University
- Current Assignee: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Arizona State University
- Current Assignee Address: US AZ Scottsdale
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- International Application: PCT/US2010/024990 WO 20100223
- International Announcement: WO2010/123619 WO 20101028
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/66
Abstract:
The present invention provides devices capable of testing the electrical performance of thin-film transistor backplane arrays and methods for their use.
Public/Granted literature
- US20120064643A1 Methods and System for On-Chip Decoder for Array Test Public/Granted day:2012-03-15
Information query
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