Invention Grant
- Patent Title: Method of fabricating a three-dimentional semiconductor memory device
- Patent Title (中): 制造三维半导体存储器件的方法
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Application No.: US13775453Application Date: 2013-02-25
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Publication No.: US08728893B2Publication Date: 2014-05-20
- Inventor: Byoungkeun Son , Jinho Kim , Hansoo Kim , Wonjun Lee , Daehyun Jang
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2009-0092452 20090929
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of fabricating a semiconductor memory device includes alternately and repeatedly stacking sacrificial layers and insulating layers on a substrate, forming an active pattern penetrating the sacrificial layers and the insulating layers, continuously patterning the insulating layers and the sacrificial layers to form a trench, removing the sacrificial layers exposed in the trench to form recess regions exposing a sidewall of the active pattern, forming an information storage layer on the substrate, forming a gate conductive layer on the information storage layer, such that the gate conductive layer fills the recess regions and defines an empty region in the trench, the empty region being surrounded by the gate conductive layer, and performing an isotropic etch process with respect to the gate conductive layer to form gate electrodes in the recess regions, such that the gate electrodes are separated from each other.
Public/Granted literature
- US20130164894A1 METHOD OF FABRICATING A THREE-DIMENTIONAL SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-06-27
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