发明授权
- 专利标题: Logical design flow with structural compatability verification
- 专利标题(中): 具有结构兼容性验证的逻辑设计流程
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申请号: US12422959申请日: 2009-04-13
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公开(公告)号: US08732651B1公开(公告)日: 2014-05-20
- 发明人: Taranjit Singh Kukal , Nikhil Gupta , Steve Durrill , Vikrant Khanna , Dingru Xiao
- 申请人: Taranjit Singh Kukal , Nikhil Gupta , Steve Durrill , Vikrant Khanna , Dingru Xiao
- 申请人地址: US CA San Jose
- 专利权人: Cadence Design Systems, Inc.
- 当前专利权人: Cadence Design Systems, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Rosenberg, Klein & Lee
- 主分类号: G06F15/04
- IPC分类号: G06F15/04 ; G06F17/50
摘要:
A design system provides data structures to store parameters of physical structures that can be viewed and modified in a front-end process through a logical design interface. In this way, system behavior defined by component structure can be evaluated and modified through a schematic representation of the data, regardless of a state of data representing the physical layout of interconnected physical structures. In electric circuit applications, for example, high frequency circuits can be incrementally designed and evaluated through structural parameters defined in a schematic diagram data abstraction without modifying and evaluating a layout data abstraction of the circuit directly.
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