Invention Grant
US08732833B2 Two-stage intrusion detection system for high-speed packet processing using network processor and method thereof
有权
用于使用网络处理器的高速分组处理的两级入侵检测系统及其方法
- Patent Title: Two-stage intrusion detection system for high-speed packet processing using network processor and method thereof
- Patent Title (中): 用于使用网络处理器的高速分组处理的两级入侵检测系统及其方法
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Application No.: US13452894Application Date: 2012-04-22
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Publication No.: US08732833B2Publication Date: 2014-05-20
- Inventor: Young-Han Choi , Deok-Jin Kim , Sung-Ryoul Lee , Man-Hee Lee , Byung-Chul Bae , Sang-Woo Park , E-Joong Yoon
- Applicant: Young-Han Choi , Deok-Jin Kim , Sung-Ryoul Lee , Man-Hee Lee , Byung-Chul Bae , Sang-Woo Park , E-Joong Yoon
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: LRK Patent Law Firm
- Priority: KR10-2011-0135926 20111215
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F12/14 ; G06F12/16 ; G08B23/00

Abstract:
A system and method for detecting network intrusion by using a network processor are provided. The intrusion detection system includes: a first intrusion detector, configured to use a first network processor to perform intrusion detection on layer 3 and layer 4 of a protocol field among information included in a packet header of a packet transmitted to the intrusion detection system, and when no intrusion is detected, classify the packets according to stream and transmit the classified packets to a second intrusion detector; and a second intrusion detector, configured to use a second network processor to perform intrusion detection through deep packet inspection (DPI) for the packet payload of the packets transmitted from the first intrusion detector. Thereby, intrusion detection for high-speed packets can be performed in a network environment.
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