发明授权
US08738167B2 3D integrated circuit device fabrication with precisely controllable substrate removal
有权
3D集成电路器件制造具有精确可控的衬底去除
- 专利标题: 3D integrated circuit device fabrication with precisely controllable substrate removal
- 专利标题(中): 3D集成电路器件制造具有精确可控的衬底去除
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申请号: US13398481申请日: 2012-02-16
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公开(公告)号: US08738167B2公开(公告)日: 2014-05-27
- 发明人: Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
- 申请人: Mukta G. Farooq , Robert Hannon , Subramanian S. Iyer , Steven J. Koester , Sampath Purushothaman , Roy R. Yu
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Fleit Gibbons Gutman Bongini & Bianco PL
- 代理商 Stephen Bongini
- 主分类号: G06F19/00
- IPC分类号: G06F19/00 ; H01L21/30 ; H01L21/46 ; H01L23/48 ; H01L23/52
摘要:
A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer is provided. The first active circuitry layer wafer comprises a P+ portion covered by a P− layer, and the P− layer includes active circuitry. The first active circuitry layer wafer is bonded face down to an interface wafer that includes a first wiring layer, and then the P+ portion of the first active circuitry layer wafer is selectively removed with respect to the P− layer of the first active circuitry layer wafer. Next, a wiring layer is fabricated on the backside of the P− layer. Also provided are a non-transitory computer readable medium encoded with a program for fabricating a 3D integrated circuit structure, and a 3D integrated circuit structure.
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