Invention Grant
- Patent Title: Practical approach to layout migration
- Patent Title (中): 布局迁移的实际方法
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Application No.: US12647997Application Date: 2009-12-28
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Publication No.: US08745554B2Publication Date: 2014-06-03
- Inventor: Ying-Chou Cheng , Tsong-Hua Ou , Josh J. H. Feng , Cheng-Lung Tsai , Ru-Gun Liu , Wen-Chun Huang
- Applicant: Ying-Chou Cheng , Tsong-Hua Ou , Josh J. H. Feng , Cheng-Lung Tsai , Ru-Gun Liu , Wen-Chun Huang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
The present disclosure provides an integrated circuit design method in many different embodiments. An exemplary IC design method comprises providing an IC design layout of a circuit in a first technology node; migrating the IC design layout of the circuit to a second technology node; applying an electrical patterning (ePatterning) modification to the migrated IC design layout according to an electrical parameter of the circuit; and thereafter fabricating a mask according to the migrated IC design layout of the circuit in the second technology node.
Public/Granted literature
- US20110161907A1 Practical Approach to Layout Migration Public/Granted day:2011-06-30
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