Invention Grant
- Patent Title: Redistribution elements and semiconductor device packages including semiconductor devices and redistribution elements
- Patent Title (中): 再分配元件和半导体器件封装,包括半导体器件和再分配元件
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Application No.: US13933294Application Date: 2013-07-02
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Publication No.: US08749050B2Publication Date: 2014-06-10
- Inventor: Choon Kuan Lee , David J. Corisis , Chong Chin Hui
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Priority: SG20081773 20080303
- Main IPC: H01L23/04
- IPC: H01L23/04

Abstract:
A method for fabricating a chip-scale board-on-chip substrate, or redistribution element, includes forming conductive planes on opposite sides of a substrate. A first of the conductive planes includes two sets of bond fingers, conductive traces that extend from a first set of the bond fingers, and two sets of redistributed bond pads, including a first set to which the conductive traces lead. The second conductive plane includes conductive traces that extend from locations that are opposite from the second set of bond fingers toward locations that are opposite from the locations of the second set of redistributed bond pads. Conductive vias are formed through the second set of bond fingers to the conductive traces of the second conductive plane. In addition, conductive vias are also formed to electrically connect the conductive vias of the second conductive plane to their corresponding redistributed bond pads in the first conductive plane.
Public/Granted literature
Information query
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