发明授权
- 专利标题: Pulse-sync demodulator
- 专利标题(中): 脉冲同步解调器
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申请号: US12374737申请日: 2007-07-27
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公开(公告)号: US08755468B2公开(公告)日: 2014-06-17
- 发明人: Michiaki Matsuo , Hideki Aoyagi , Hitoshi Asano , Kazuya Toki
- 申请人: Michiaki Matsuo , Hideki Aoyagi , Hitoshi Asano , Kazuya Toki
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: Pearne & Gordon LLP
- 优先权: JP2006-205051 20060727; JP2007-194449 20070726
- 国际申请: PCT/JP2007/064811 WO 20070727
- 国际公布: WO2008/013284 WO 20080131
- 主分类号: H04L27/06
- IPC分类号: H04L27/06
摘要:
A received pulse signal based on an on-off keying modulation scheme is alternately sampled by AD conversion sections operated by a clock signal whose frequency is one-half of a transmission rate. In the synchronization, amounts of delay in sampling timing adjustment sections are made different from each other, whereby phases of two different points in a symbol pulse are sampled. An amount of delay in a variable delay section is adjusted in accordance with a result of comparison of the sampled values, thereby achieving synchronization. At the time of demodulation, the amount of delay in the variable delay section is held, and the amounts of delay in the sampling timing adjustment sections are switched to the same value, and the symbol pulse is alternately sampled. The sampled values are subjected to threshold value determination, and the determination result is subjected to parallel-to-serial conversion, whereby a demodulation output is acquired.
公开/授权文献
- US20100246660A1 Pulse-Sync Demodulator 公开/授权日:2010-09-30