Invention Grant
US08759208B2 Method for manufacturing contact holes in CMOS device using gate-last process
有权
使用栅极最后工艺在CMOS器件中制造接触孔的方法
- Patent Title: Method for manufacturing contact holes in CMOS device using gate-last process
- Patent Title (中): 使用栅极最后工艺在CMOS器件中制造接触孔的方法
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Application No.: US13141982Application Date: 2011-02-21
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Publication No.: US08759208B2Publication Date: 2014-06-24
- Inventor: Jiang Yan
- Applicant: Jiang Yan
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN Beijing
- Agency: Martine Penilla Group, LLP
- Priority: CN201010542475 20101111
- International Application: PCT/CN2011/000261 WO 20110221
- International Announcement: WO2012/062021 WO 20120518
- Main IPC: H01L21/3205
- IPC: H01L21/3205

Abstract:
The present invention provides a method for manufacturing contact holes in a CMOS device by using a gate-last process, comprising: forming high-K dielectrics/metal gates (HKMG) of a first type MOS; forming and metalizing lower contact holes of the source/drain of a first type MOS and a second type MOS as well as forming HKMG of a second type MOS simultaneously, wherein the lower contact holes of the source/drain are filled with the same material as that used by the metal gate of the second type MOS; forming and metalizing contact holes of metal gates of a first type MOS and a second type MOS as well as upper contact holes of the source/drain, wherein the upper contact holes of the source/drain are aligned with the lower contact holes of the source/drain. The method reduces the difficulty of contact hole etching and metal deposition, simplifies the process steps, and increases the reliability of the device.
Public/Granted literature
- US20120196432A1 Method for Manufacturing Contact Holes in CMOS Device Using Gate-Last Process Public/Granted day:2012-08-02
Information query
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