发明授权
- 专利标题: Chip-on-lead package and method of forming
- 专利标题(中): 芯片引线封装及成型方法
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申请号: US13354752申请日: 2012-01-20
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公开(公告)号: US08759978B2公开(公告)日: 2014-06-24
- 发明人: Atapol Prajuckamol , Bih Wen Fon , Jun Keat Lee
- 申请人: Atapol Prajuckamol , Bih Wen Fon , Jun Keat Lee
- 申请人地址: US AZ Phoenix
- 专利权人: Semiconductor Components Industries, LLC
- 当前专利权人: Semiconductor Components Industries, LLC
- 当前专利权人地址: US AZ Phoenix
- 代理商 Kevin B. Jackson
- 优先权: MYPI2011006354 20111229
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.
公开/授权文献
- US20130168866A1 CHIP-ON-LEAD PACKAGE AND METHOD OF FORMING 公开/授权日:2013-07-04
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