Invention Grant
US08761209B1 System and method for the aggregation of 10GBASE-R signals into pseudo 100GBASE-R signals
有权
将10GBASE-R信号聚合成伪100GBASE-R信号的系统和方法
- Patent Title: System and method for the aggregation of 10GBASE-R signals into pseudo 100GBASE-R signals
- Patent Title (中): 将10GBASE-R信号聚合成伪100GBASE-R信号的系统和方法
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Application No.: US13285562Application Date: 2011-10-31
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Publication No.: US08761209B1Publication Date: 2014-06-24
- Inventor: Matthew Brown , Dimitrios Giannakopoulos
- Applicant: Matthew Brown , Dimitrios Giannakopoulos
- Applicant Address: US CA Sunnyvale
- Assignee: Applied Micro Circuits Corporation
- Current Assignee: Applied Micro Circuits Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: H04J3/02
- IPC: H04J3/02 ; H04L12/54 ; H04L29/06

Abstract:
An Ethernet physical layer (PHY) module is provided with a method for transceiving between a 10GBASE-R client interface and a 100G attachment interface. On each of ten client interface logical lanes a 10GBASE-R signal is accepted. Each 10GBASE-R logical lane is demultiplexed into two 5 gigabit per second (Gbps) pseudo 100GBASE-R logical lanes, creating a total of twenty pseudo 100GBASE-R logical lanes. The pseudo 100GBASE-R logical lanes are arranged into n groups of 20/n pseudo 100GBASE-R logical lanes. Further, the pseudo 100GBASE-R logical lanes from each group are arranged into a 100G attachment logical lane. Finally, a 100G attachment logical lane is transmitted at an attachment interface on each of n physical lanes. In the reverse direction, each of n physical lanes accepts a 100G attachment logical lane at the attachment interface, and a de-aggregation process supplies a 10GBASE-R signal on each of ten client interface logical lanes.
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