发明授权
- 专利标题： Packaging and function tests for package-on-package and system-in-package structures
- 专利标题（中）： 包装封装和系统级封装结构的封装和功能测试
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申请号： US13225113申请日： 2011-09-02
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公开(公告)号： US08765497B2公开(公告)日： 2014-07-01
- 发明人: Hao-Juin Liu , Chita Chuang , Ching-Wen Hsiao , Chen-Shien Chen , Chen-Cheng Kuo , Chih-Hua Chen
- 申请人： Hao-Juin Liu , Chita Chuang , Ching-Wen Hsiao , Chen-Shien Chen , Chen-Cheng Kuo , Chih-Hua Chen
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater and Matsil, L.L.P.
- 主分类号： H01L21/66
- IPC分类号： H01L21/66 ; H01L23/00 ; H01L23/48
摘要：
A method includes placing a plurality of bottom units onto a jig, wherein the plurality of bottom units is not sawed apart and forms an integrated component. Each of the plurality of bottom units includes a package substrate and a die bonded to the package substrate. A plurality of upper component stacks is placed onto the plurality of bottom units, wherein solder balls are located between the plurality of upper component and the plurality of bottom units. A reflow is performed to join the plurality of upper component stacks with respective ones of the plurality of bottom units through the solder balls.