Invention Grant
- Patent Title: Vertical switch three-dimensional memory array
- Patent Title (中): 垂直开关三维记忆阵列
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Application No.: US12720843Application Date: 2010-03-10
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Publication No.: US08773881B2Publication Date: 2014-07-08
- Inventor: Daniel R. Shepard
- Applicant: Daniel R. Shepard
- Applicant Address: US MA N. Billerica
- Assignee: Contour Semiconductor, Inc.
- Current Assignee: Contour Semiconductor, Inc.
- Current Assignee Address: US MA N. Billerica
- Agency: Bingham McCutchen LLP
- Main IPC: G11C5/02
- IPC: G11C5/02

Abstract:
Methods of forming memory devices include providing a substrate, forming source, channel, and drain layers over the substrate, and patterning the source, channel, and drain layers into an array of memory switches each having a cross-sectional area less than 6 F2. The channel layer has a doping type different from a doping type of the source layer, and the drain layer has a doping type different from a doping type of the channel layer.
Public/Granted literature
- US20100232200A1 VERTICAL SWITCH THREE-DIMENSIONAL MEMORY ARRAY Public/Granted day:2010-09-16
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