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US08773881B2 Vertical switch three-dimensional memory array 有权
垂直开关三维记忆阵列

Vertical switch three-dimensional memory array
Abstract:
Methods of forming memory devices include providing a substrate, forming source, channel, and drain layers over the substrate, and patterning the source, channel, and drain layers into an array of memory switches each having a cross-sectional area less than 6 F2. The channel layer has a doping type different from a doping type of the source layer, and the drain layer has a doping type different from a doping type of the channel layer.
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