A network packet processor includes a plurality of processing pipelines and a scheduling circuit. Each processing pipeline is configured and arranged to process packets having sizes less than or equal to an associated processing size of the processing pipeline. The respective processing size of one of the processing pipelines is different from the processing size of at least one other of the processing pipelines. The scheduling circuit is coupled to the plurality of processing pipelines and is configured and arranged to determine respective packet sizes of packets input from a bus. The scheduling circuit assigns each packet of the one or more packets for processing by one of the processing pipelines as a function of the respective packet size of the packet and the processing size associated with the one of the processing pipelines.