发明授权
- 专利标题: Memory device and system including a memory device electronically connectable to a host circuit
- 专利标题(中): 存储器件和系统,包括可与电路连接的存储器件
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申请号: US12751438申请日: 2010-03-31
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公开(公告)号: US08782326B2公开(公告)日: 2014-07-15
- 发明人: Yasuhiko Kosugi
- 申请人: Yasuhiko Kosugi
- 申请人地址: JP Tokyo
- 专利权人: Seiko Epson Corporation
- 当前专利权人: Seiko Epson Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Stroock & Stroock & Lavan LLP
- 优先权: JP2009-088593 20090401; JP2009-195318 20090826
- 主分类号: G06F11/07
- IPC分类号: G06F11/07 ; G06F12/16
摘要:
A memory includes a nonvolatile memory cell array, and a memory control circuit which carries out writing of data to and reading of data from the memory cell array in access units of N bits where N is an integer equal to 2 or greater. The memory cell array includes a rewritable area in which both writing of data and reading of data are permissible, and a read-only area in which writing of data is prohibited and reading of data is permissible. The rewritable area is configured so that the N bits constituting one access unit contain both actual data and an error detection code. The read-only area is divided between an actual data area in which the N bits constituting one access unit contain actual data, and an error detection code area in which the N bits constituting one access unit contain error detection codes.