Invention Grant
- Patent Title: Non-replacement gate nanomesh field effect transistor with pad regions
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Application No.: US14022469Application Date: 2013-09-10
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Publication No.: US08785981B1Publication Date: 2014-07-22
- Inventor: Josephine B. Chang , Paul Chang , Isaac Lauer , Jeffrey W. Sleight
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: H01L29/745
- IPC: H01L29/745 ; H01L21/336

Abstract:
A gate-first processing scheme for forming a nanomesh field effect transistor is provided. An alternating stack of two different semiconductor materials is patterned to include two pad regions and nanowire regions. A semiconductor material is laterally etched selective to another semiconductor material to form a nanomesh including suspended semiconductor nanowires. A stack of a gate dielectric, a gate electrode, and a gate cap dielectric is formed over the nanomesh. A dielectric spacer is formed around the gate electrode. An isotropic etch is employed to remove dielectric materials that are formed in lateral recesses of the patterned alternating stack. A selective epitaxy process can be employed to form a source region and a drain region.
Information query
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