Invention Grant
US08787057B2 Fast analog memory cell readout using modified bit-line charging configurations
有权
使用修改的位线充电配置快速模拟存储单元读数
- Patent Title: Fast analog memory cell readout using modified bit-line charging configurations
- Patent Title (中): 使用修改的位线充电配置快速模拟存储单元读数
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Application No.: US13709656Application Date: 2012-12-10
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Publication No.: US08787057B2Publication Date: 2014-07-22
- Inventor: Eyal Gurgi , Yael Shur , Yoav Kasorla
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G11C27/00
- IPC: G11C27/00

Abstract:
A method for data storage includes providing at least first and second readout schemes for reading storage values from a group of analog memory cells that are connected to respective bit lines. The first readout scheme reads the storage values using a first bit line charging configuration having a first sense time, and the second readout scheme reads the storage values using a second bit line charging configuration having a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout schemes is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout scheme.
Public/Granted literature
- US20140052940A1 FAST ANALOG MEMORY CELL READOUT USING MODIFIED BIT-LINE CHARGING CONFIGURATIONS Public/Granted day:2014-02-20
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