Invention Grant
- Patent Title: N-well switching circuit
- Patent Title (中): N阱切换电路
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Application No.: US13742964Application Date: 2013-01-16
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Publication No.: US08787096B1Publication Date: 2014-07-22
- Inventor: Esin Terzioglu , Gregory Ameriada Uvieghara , Sei Seung Yoon , Balachander Ganesan , Anil Chowdary Kota
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C13/00

Abstract:
A dual-mode PMOS transistor is disclosed that has a first mode of operation in which a switched n-well for the dual-mode PMOS transistor is biased to a high voltage. The dual-mode PMOS transistor has a second mode of operation in which the switched n-well is biased to a low voltage that is lower than the high voltage. The dual-mode PMOS transistor has a size and gate-oxide thickness each having a magnitude that cannot accommodate a permanent tie to the high voltage. An n-well voltage switching circuit biases the switched n-well to prevent voltage damage to the dual-mode PMOS transistor despite its relatively small size and thin gate-oxide thickness.
Public/Granted literature
- US20140198588A1 N-WELL SWITCHING CIRCUIT Public/Granted day:2014-07-17
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