Methods and systems for transmitting video pixel data from a transmitter component, such as a controller, to a receiver within a monitor are described. Video data is received at a transmitter at an incoming pixel rate based on a pixel clock. The data is transmitted to the receiver at a link symbol clock rate and is drained from the receiver at the pixel clock rate, which is regenerated by the receiver using the link symbol clock frequency, an M video value, and an N video value. The M video value (Mvid) is determined by the transmitter based on the incoming pixel rate and the N video value (Nvid) may be constant. An accumulator is used within the transmitter to ensure that the transmitter and receiver create a balanced system.