Invention Grant
- Patent Title: Dynamic memory module switching with read prefetch caching
- Patent Title (中): 动态内存模块切换,带读取预取缓存
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Application No.: US12784542Application Date: 2010-05-21
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Publication No.: US08806140B1Publication Date: 2014-08-12
- Inventor: Waseem Saify Kraipak , George Bendak
- Applicant: Waseem Saify Kraipak , George Bendak
- Applicant Address: US CA Sunnyvale
- Assignee: Applied Micro Circuits Corporation
- Current Assignee: Applied Micro Circuits Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Amin, Turocy & Watson, LLP
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A system and method are provided for using a system-on-chip (SoC) memory manager to optimize the use of off-chip memory modules. A SoC memory controller receives a request for a first data block, subsequent to shutting the first memory down, and determines that the first data block is stored in the first memory. A SoC memory switching core uses a memory map to translate the first data block address in the first memory module to a first data block address in the second memory module. If the first data block is present in an on-SoC cache, the first data block is supplied on the SoC data bus from the cache. Then, the cache is loaded with a plurality of data blocks from a corresponding plurality of addresses in the second memory module, associated with the first data block address.
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