Invention Grant
- Patent Title: Sequential atomic layer deposition of electrodes and resistive switching components
- Patent Title (中): 电极和电阻式开关元件的顺序原子层沉积
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Application No.: US13721549Application Date: 2012-12-20
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Publication No.: US08809205B2Publication Date: 2014-08-19
- Inventor: Yun Wang , Tony P. Chiang , Tim Minvielle , Takeshi Yamaguchi
- Applicant: Intermolecular, Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
- Applicant Address: US CA San Jose JP Tokyo US CA Milpitas
- Assignee: Intermolecular, Inc.,Kabushiki Kaisha Toshiba,SanDisk 3D LLC
- Current Assignee: Intermolecular, Inc.,Kabushiki Kaisha Toshiba,SanDisk 3D LLC
- Current Assignee Address: US CA San Jose JP Tokyo US CA Milpitas
- Main IPC: H01L21/469
- IPC: H01L21/469

Abstract:
Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.
Public/Granted literature
- US20140175354A1 SEQUENTIAL ATOMIC LAYER DEPOSITION OF ELECTRODES AND RESISTIVE SWITCHING COMPONENTS Public/Granted day:2014-06-26
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