A system for functional verification of a chip design includes the chip design, a test generator, a test bench, a verification tool, and a coverage tool. The coverage tool is configured to receive chip design, user input, and coverage files from the verification tool to generate information for the test generator to improve the test coverage of the verification tool. The method includes receiving a chip design, functionally testing the chip design, generating coverage files, receiving user options, including a coverage basis, a report basis, and a defined coverage, calculating coverage impact and new overall coverage using the defined coverage and coverage files, and ranking each report basis according to coverage impact of each coverage basis.