发明授权
- 专利标题： Delay detector circuit and receiver apparatus
- 专利标题（中）： 延迟检测电路和接收装置
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申请号： US13576809申请日： 2010-07-08
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公开(公告)号： US08831152B2公开(公告)日： 2014-09-09
- 发明人: Naoki Umeda , Mituru Maeda
- 申请人： Naoki Umeda , Mituru Maeda
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： Renner, Otto, Boisselle & Sklar, LLP
- 优先权： JP2010-022671 20100204
- 国际申请： PCT/JP2010/004451 WO 20100708
- 国际公布： WO2011/096025 WO 20110811
- 主分类号： H03D1/00
- IPC分类号： H03D1/00 ; H04L27/227 ; H04L7/04
摘要：
The present invention provides a delay detector circuit that delivers performance at low cost and can reduce power consumption, and a receiver apparatus that uses this delay detector circuit. The delay detector circuit according to the present invention performs a part of decoding processing for decoding data transmitted by a transmitter apparatus based on a received wave of a two-phase modulation method. The receiver apparatus according to the present invention uses the delay detector circuit described above. Therefore the delay detector circuit and receiver apparatus of the present invention deliver performance at low cost and can reduce power consumption.
公开/授权文献
- US20120294394A1 DELAY DETECTOR CIRCUIT AND RECEIVER APPARATUS 公开/授权日：2012-11-22
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