Invention Grant
- Patent Title: Transistor with minimized resistance
- Patent Title (中): 具有最小电阻的晶体管
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Application No.: US13407783Application Date: 2012-02-29
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Publication No.: US08836029B2Publication Date: 2014-09-16
- Inventor: Paul F. Illegems
- Applicant: Paul F. Illegems
- Applicant Address: US NY Hauppauge
- Assignee: SMSC Holdings S.A.R.L.
- Current Assignee: SMSC Holdings S.A.R.L.
- Current Assignee Address: US NY Hauppauge
- Agency: King & Spalding L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
The present disclosure discloses a power transistor array designed to have a very low resistance. The power transistor array includes a bottom metal layer and a top metal layer. The bottom metal layer includes a plurality of strips, each corresponding to either drain or source strips, the drain and source strips being placed in parallel and alternating with each other. Further, the top metal layer, above the bottom metal layer, includes a plurality of strips. Each strip corresponds to either drain or source strips, the drain and the source strips being placed and alternating with each other. The strips of the top metal layer are oriented at angle with respect to the strips of the bottom metal layer. Moreover, the power transistor includes a plurality of bond pads on the top metal layer, and bond wires with one end attached to the corresponding bond pad.
Public/Granted literature
- US20130221437A1 TRANSISTOR WITH MINIMIZED RESISTANCE Public/Granted day:2013-08-29
Information query
IPC分类: