Invention Grant
US08850229B2 Apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor
有权
一种用于生成用于解密从微处理器中的指令高速缓存取出的加密指令数据块的解密密钥的装置
- Patent Title: Apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor
- Patent Title (中): 一种用于生成用于解密从微处理器中的指令高速缓存取出的加密指令数据块的解密密钥的装置
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Application No.: US14066270Application Date: 2013-10-29
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Publication No.: US08850229B2Publication Date: 2014-09-30
- Inventor: G. Glenn Henry , Terry Parks , Brent Bean , Thomas A. Crispin
- Applicant: VIA Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agent E. Alan Davis; James W. Huffman
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F21/71 ; G06F9/30 ; H04L9/08 ; G06F21/52 ; G06F21/60 ; G06F12/08 ; G06F21/54 ; H04L9/06 ; G06F21/72
Abstract:
An apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address includes a first multiplexer that selects a first key value from a plurality of key values based on a first portion of the fetch address. A second multiplexer selects a second key value from the plurality of key values based on the first portion of the fetch address. A rotater rotates the first key value based on a second portion of the fetch address. An arithmetic unit selectively adds or subtracts the rotated first key value to or from the second key value based on a third portion of the fetch address to generate the decryption key.
Public/Granted literature
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