An architecture for an electronic gaming machine (EGM) includes multiple processors that separate game logic from game presentation. The multi-processor architecture includes a dedicated game logic engine and a dedicated presentation engine. A first processor having the game logic engine is adapted to handle the input/output (I/O), peripherals, communications, accounting, critical gaming and other game logic, power hit tolerances, protocols to other systems, and other tasks related to operation of the EGM. A second processor is adapted to running a presentation engine. The second processor receives commands from the first processor to present game-oriented outcome and results.