Invention Grant
- Patent Title: Methods for fabricating integrated circuits
- Patent Title (中): 集成电路的制造方法
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Application No.: US13420412Application Date: 2012-03-14
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Publication No.: US08853037B2Publication Date: 2014-10-07
- Inventor: Jin Cho
- Applicant: Jin Cho
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, Inc.
- Current Assignee: GLOBALFOUNDRIES, Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234 ; H01L21/8238 ; H01L29/66 ; H01L29/78

Abstract:
Methods are provided for forming semiconductor devices. One method includes forming a first layer overlying a bulk semiconductor substrate. A second layer is formed overlying the first layer. A plurality of trenches is etched into the first and second layers. Portions of the second layer that are disposed between the plurality of trenches define a plurality of fins. A gate structure is formed overlying the plurality of fins. The first layer is etched to form gap spaces between the bulk semiconductor substrate and the plurality of fins. The plurality of fins is at least partially supported in position adjacent to the gap spaces by the gate structure. The gap spaces are filled with an insulating material.
Public/Granted literature
- US20130244387A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS Public/Granted day:2013-09-19
Information query
IPC分类: