Invention Grant
- Patent Title: Streamlined process for vertical semiconductor devices
- Patent Title (中): 用于垂直半导体器件的简化工艺
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Application No.: US13666193Application Date: 2012-11-01
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Publication No.: US08853048B2Publication Date: 2014-10-07
- Inventor: Wu-An Weng , Chen-Chien Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L21/8242
- IPC: H01L21/8242 ; H01L21/20 ; H01L49/02 ; H01L27/108 ; H01L29/94

Abstract:
The present disclosure provides a streamlined approach to forming vertically structured devices such as deep trench capacitors. Trenches and a contact plate bridging the trenches are formed using one lithographic process. A hard mask is formed over the substrate and etched through the mask to form two or more closely spaced trenches. The hard mask is then reduced by an isotropic etch process. The etch removes the hard mask preferentially between the trenches. Chemical mechanical polishing removes the conductive material down to the remaining hard mask layer, whereby conductive material remains in mask openings and forms a conductive bridge across the trenches.
Public/Granted literature
- US20140120690A1 Streamlined Process for Vertical Semiconductor Devices Public/Granted day:2014-05-01
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