A method for fabricating a through-silicon via comprises the following steps. Provide a substrate. Form a through silicon hole in the substrate having a diameter of at least 1 μm and a depth of at least 5 μm. Perform a first chemical vapor deposition process with a first etching/deposition ratio to form a dielectric layer lining the bottom and sidewall of the through silicon hole and the top surface of the substrate. Perform a shape redressing treatment with a second etching/deposition ratio to change the profile of the dielectric layer. Repeat the first chemical vapor deposition process and the shape redressing treatment at least once until the thickness of the dielectric layer reaches to a predetermined value.