Invention Grant
- Patent Title: Power LDMOS device and high voltage device
- Patent Title (中): 电源LDMOS器件和高压器件
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Application No.: US13169058Application Date: 2011-06-27
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Publication No.: US08853738B2Publication Date: 2014-10-07
- Inventor: Chung-Yeh Lee , Pei-Hsun Wu , Shiang-Wen Huang
- Applicant: Chung-Yeh Lee , Pei-Hsun Wu , Shiang-Wen Huang
- Applicant Address: TW Hsinchu
- Assignee: Episil Technologies Inc.
- Current Assignee: Episil Technologies Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW100113398A 20110418
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L29/10 ; H01L29/423

Abstract:
A power LDMOS device including a substrate, source and drain regions, gates and trench insulating structures is provided. The substrate has a finger tip area, a finger body area and a palm area. The source regions are in the substrate in the finger body area and further extend to the finger tip area. The neighboring source regions in the finger tip area are connected. The outmost two source regions further extend to the palm area and are connected. The drain regions are in the substrate in the finger body area and further extend to the palm area. The neighboring drain regions in the palm area are connected. The source and drain regions are disposed alternately. A gate is disposed between the neighboring source and drain regions. The trench insulating structures are in the substrate in the palm area and respectively surround ends of the drain regions.
Public/Granted literature
- US20120261752A1 POWER LDMOS DEVICE AND HIGH VOLTAGE DEVICE Public/Granted day:2012-10-18
Information query
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