Invention Grant
- Patent Title: Nonvolatile semiconductor memory device including pillars buried inside through holes
- Patent Title (中): 非易失性半导体存储器件包括埋入通孔内的柱
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Application No.: US13275436Application Date: 2011-10-18
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Publication No.: US08853766B2Publication Date: 2014-10-07
- Inventor: Takashi Maeda , Yoshihisa Iwata
- Applicant: Takashi Maeda , Yoshihisa Iwata
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-080526 20080326
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/115

Abstract:
In a nonvolatile semiconductor memory device, a stacked body is formed by alternately stacking dielectric films and conductive films on a silicon substrate and a plurality of through holes extending in the stacking direction are formed in a matrix configuration. A shunt interconnect and a bit interconnect are provided above the stacked body. Conductor pillars are buried inside the through holes arranged in a line immediately below the shunt interconnect out of the plurality of through holes, and semiconductor pillars are buried inside the remaining through holes. The conductive pillars are formed from a metal, or low resistance silicon. Its upper end portion is connected to the shunt interconnect and its lower end portion is connected to a cell source formed in an upper layer portion of the silicon substrate.
Public/Granted literature
- US20120043601A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2012-02-23
Information query
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