Invention Grant
- Patent Title: Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit
- Patent Title (中): 具有静电耦合MOS晶体管的集成电路及其制造方法
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Application No.: US12868488Application Date: 2010-08-25
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Publication No.: US08853785B2Publication Date: 2014-10-07
- Inventor: Emmanuel Augendre , Maud Vinet , Laurent Clavelier , Perrine Batude
- Applicant: Emmanuel Augendre , Maud Vinet , Laurent Clavelier , Perrine Batude
- Applicant Address: FR Paris
- Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
- Current Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
- Current Assignee Address: FR Paris
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR0956081 20090907
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
An integrated circuit including at least: a first MOS transistor; a second MOS transistor, arranged on the first MOS transistor, the second MOS transistor including a channel region in at least one semiconductor layer including two approximately parallel primary faces; a portion of at least one electrically conductive material electrically connected to a gate of the first transistor and arranged between the gate of the first transistor and the channel region of the second transistor; a dielectric layer arranged at least between the portion of the electrically conductive material and the channel region of the second transistor; and a section of the channel region of the second transistor in a plane parallel to the two primary faces of the semiconductor layer is included in a section of the portion of the electrically conductive material projected in said plane.
Public/Granted literature
Information query
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