Invention Grant
US08853840B2 Semiconductor package with inner and outer leads 有权
具有内外引线的半导体封装

Semiconductor package with inner and outer leads
Abstract:
A semiconductor die has outer leads with an outer lead external connection section and an outer lead bonding section. Inner leads are spaced from the outer leads. Each of the inner leads has an inner lead external connection section spaced and downset from an inner lead bonding section. A non-electrically conductive die mount is molded onto upper surface areas of each inner lead external connection section. A semiconductor die is mounted on the non-electrically conductive die mount and bond wire provide interconnects for selectively electrically connecting bonding pads of the die to the inner lead bonding sections and at least one outer lead bonding section. A mold compound covers the semiconductor die, the bond wires, and the outer and inner lead bonding sections.
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