Invention Grant
- Patent Title: 3-D integration using multi stage vias
- Patent Title (中): 使用多级通孔的3-D集成
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Application No.: US13101268Application Date: 2011-05-05
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Publication No.: US08853857B2Publication Date: 2014-10-07
- Inventor: Mukta G Farooq , Troy L Graves-Abe
- Applicant: Mukta G Farooq , Troy L Graves-Abe
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Howard M. Cohn; Steven J. Meyers
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768

Abstract:
A TSV can be formed having a top section via formed through the top substrate surface and a bottom section via formed through the bottom substrate surface. The top section cross section can have a minimum cross section corresponding to design rules, and the top section depth can correspond to a workable aspect ratio. The top section via can be filled or plugged so that top side processing can be continued. The bottom section via can have a larger cross section for ease of forming a conductive path therethrough. The bottom section via extends from the back side to the bottom of the top section via and is formed after the substrate has been thinned. The TSV is can be completed by forming a conductive path after removing sacrificial fill materials from the joined top and bottom section vias.
Public/Granted literature
- US20120280395A1 3-D Integration using Multi Stage Vias Public/Granted day:2012-11-08
Information query
IPC分类: