Invention Grant
US08853860B2 Method and apparatus for reduced parasitics and improved multi-finger transistor thermal impedance
有权
减少寄生效应的方法和装置以及改进的多手指晶体管热阻抗
- Patent Title: Method and apparatus for reduced parasitics and improved multi-finger transistor thermal impedance
- Patent Title (中): 减少寄生效应的方法和装置以及改进的多手指晶体管热阻抗
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Application No.: US13719048Application Date: 2012-12-18
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Publication No.: US08853860B2Publication Date: 2014-10-07
- Inventor: Zachary M. Griffith
- Applicant: Zachary M. Griffith
- Applicant Address: US CA Thousand Oaks
- Assignee: Teledyne Scientific & Imaging, LLC
- Current Assignee: Teledyne Scientific & Imaging, LLC
- Current Assignee Address: US CA Thousand Oaks
- Agency: Snell & Wilmer LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H03F1/22 ; H01L23/482 ; H03F3/19 ; H01L21/768 ; H01L29/737 ; H01L29/778
Abstract:
A transistor, a method and an apparatus for forming multiple connections to a transistor for reduced gate (FET/HEMT) or base (BJT/HBT) parasitics, and improved multi-finger transistor thermal impedance. Providing for a method and an apparatus that reduces a transistor's parasitics and reduces a transistor's thermal impedance, resulting in higher device bandwidths and higher output power. More particularly, providing for a method and an apparatus for applying compact, multiple connections to the gate of a FET (or HEMT) or the base of a BJT (or HBT) from many sides resulting in reduced parasitics and improved transistor thermal impedance.
Public/Granted literature
- US20130249110A1 METHOD AND APPARATUS FOR REDUCED PARASITICS AND IMPROVED MULTI-FINGER TRANSISTOR THERMAL IMPEDANCE Public/Granted day:2013-09-26
Information query
IPC分类:
