Invention Grant
- Patent Title: Semiconductor structures including sub-resolution alignment marks
- Patent Title (中): 包括子分辨率对准标记的半导体结构
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Application No.: US14059548Application Date: 2013-10-22
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Publication No.: US08853868B2Publication Date: 2014-10-07
- Inventor: David S. Pratt , Marc A. Sulfridge
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L23/544
- IPC: H01L23/544 ; G03F9/00 ; H01L27/146 ; H01L23/48 ; H01L21/768

Abstract:
A method of fabricating semiconductor structures comprising sub-resolution alignment marks is disclosed. The method comprises forming a dielectric material on a substrate and forming at least one sub-resolution alignment mark extending partially into the dielectric material. At least one opening is formed in the dielectric material. Semiconductor structures comprising the sub-resolution alignment marks are also disclosed.
Public/Granted literature
- US20140048953A1 SEMICONDUCTOR STRUCTURES INCLUDING SUB-RESOLUTION ALIGNMENT MARKS Public/Granted day:2014-02-20
Information query
IPC分类: