A clock-detecting circuit, containing at least a microprocessor, a clock circuit, and a zero-cross detecting circuit. The clock circuit is connected to the microprocessor. The input end of the zero-cross detecting circuit is connected to the utility power AC input. The output end of the zero-cross detecting circuit is connected to the input end of the microprocessor. The zero-cross detecting circuit operates to detect zero crossing points of the utility power AC input. The microprocessor operates to count the number of oscillation periods of the clock circuit in a time interval between two adjacent zero crossing points of the utility power AC input and to detect clock precision of the microprocessor according to the counted number. The circuit according to the invention features simple structure and low production cost, and is reliable and easy to be implemented.