Invention Grant
US08854075B2 Delay-insensitive asynchronous circuit 有权
延迟不敏感的异步电路

  • Patent Title: Delay-insensitive asynchronous circuit
  • Patent Title (中): 延迟不敏感的异步电路
  • Application No.: US13785770
    Application Date: 2013-03-05
  • Publication No.: US08854075B2
    Publication Date: 2014-10-07
  • Inventor: Marc RenaudinDavid Nguyen Van Mau
  • Applicant: Tiempo
  • Applicant Address: FR Montbonnot St-Martin
  • Assignee: Tiempo
  • Current Assignee: Tiempo
  • Current Assignee Address: FR Montbonnot St-Martin
  • Agency: Oliff, PLC
  • Priority: FR1200669 20120306; FR1200670 20120306
  • Main IPC: H03K19/003
  • IPC: H03K19/003 H03K19/177
Delay-insensitive asynchronous circuit
Abstract:
The asynchronous circuit includes a fork having at least two branches, each branch being connected to a logic gate so that the logic gate receives as input a branch-ending signal. It further includes a circuit for branching the branch-ending signal at the level of each logic gate to form a branched signal, and a blocking circuit comprising a Muller gate and receiving as input at least one branched signal, the blocking circuit being configured to prevent the propagation of an output signal when the branch-ending signals are in different logic states.
Public/Granted literature
Information query
Patent Agency Ranking
0/0