Disclosed herein are techniques for providing a programming voltage to a selected word line in a non-volatile memory array. This may be a 3D NAND, 2D NAND, or another type of memory array. The programming voltage may be quickly ramped up on the selected word line, without the need for adding a stronger charge pump to the memory device. The voltage on the selected word line may be ramped up to a target voltage during a channel pre-charge phase. The target voltage may be limited in magnitude so that program disturb does not occur. Next, during a channel boosting phase, the unselected word lines are increased to a boosting voltage. The voltage on the selected word line is also increased during the boosting phase to a second target level. Then, the voltage on the selected word line is charged up from the second target level to a program voltage.