Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13785666Application Date: 2013-03-05
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Publication No.: US08854896B2Publication Date: 2014-10-07
- Inventor: Koji Hosono , Toshifumi Shano
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2012-223507 20121005
- Main IPC: G11C8/08
- IPC: G11C8/08 ; G11C16/30 ; G11C16/08 ; G11C16/26 ; G11C11/4074 ; G11C5/14 ; G11C16/24 ; G11C16/04 ; G11C7/00

Abstract:
A nonvolatile semiconductor memory device comprises multiple memory strings each including a plurality of first and second groups of serially connected memory cells, and a back gate transistor serially connected between the first and second groups of memory cells, a plurality of word lines, each word line being connected to a control gate of a different memory cell in each of the memory strings, a voltage generating circuit configured to generate control voltages of different voltage levels, and a control circuit configured to control application of control voltages to the word lines and the back gate line. A control voltage applied to the back gate line may be varied depending on how far a selected word line is from the back gate line, and a control voltage applied to unselected word lines may be varied depending on how far the unselected word line is from the selected word line.
Public/Granted literature
- US20140098612A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2014-04-10
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