Invention Grant
US08856559B2 Integrated circuit allowing to test a power management unit based on or more conditions and configuring the plurality of pins to operate in normal and test mode
有权
集成电路允许基于一个或多个条件测试电源管理单元并且将多个引脚配置为在正常和测试模式下操作
- Patent Title: Integrated circuit allowing to test a power management unit based on or more conditions and configuring the plurality of pins to operate in normal and test mode
- Patent Title (中): 集成电路允许基于一个或多个条件测试电源管理单元并且将多个引脚配置为在正常和测试模式下操作
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Application No.: US13437675Application Date: 2012-04-02
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Publication No.: US08856559B2Publication Date: 2014-10-07
- Inventor: Veronica Alarcon , Love Kothari , Amar Guettaf , Kerry Thompson
- Applicant: Veronica Alarcon , Love Kothari , Amar Guettaf , Kerry Thompson
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Sterne, Kessler, Goldstein & Fox PLLC
- Main IPC: G06F1/00
- IPC: G06F1/00 ; H03K5/13 ; G06F1/32 ; H03K19/01 ; H03K3/037 ; H03K3/03 ; H03K5/00
Abstract:
An integrated circuit is disclosed that contains both a PMU and another processing portion, such as a baseband. Because of the limited pins devoted to the PMU, the PMU receives most of its signals through the other processing portion of the integrated circuit. Thus, in order to protect the PMU, the integrated circuit isolates the PMU portion from receiving different signals from the other processing portion until after certain conditions are satisfied. In addition, the integrated circuit includes a GPIO pin bank in the other processing portion that can be freely configured so as to allow for testing of the PMU.
Public/Granted literature
- US20130047000A1 INTEGRATED CIRCUIT ALLOWING FOR TESTING AND ISOLATION OF INTEGRATED POWER MANAGEMENT UNIT Public/Granted day:2013-02-21
Information query
